A typical DC-DC converter has a high-side power transistor and a low-side power transistor connected in series between supply terminals, and an external inductor connected between the interconnection node of the power transistors, usually referred to as the switch node, and an output terminal to which a load is connected. The low-side transistor acts as a synchronous rectifier to improve efficiency compared to solutions with a rectifier diode by eliminating the voltage drop across the diode and replacing it with a small voltage drop of a low resistance transistor switch. While this solution is very effective at high load currents, a problem at low load current is that the inductor current reverses and will not be blocked naturally by reverse biasing of a diode. This results in a power loss in the synchronous rectifier, reducing efficiency at low load current. To address this problem, it is necessary to detect the reversal of inductor current and turn off the low-side transistor at the right time before such current reversal can occur. One way to determine the right time for the turn-off edge of the low-side gate drive signal is to detect the zero-crossing of the inductor current using a comparator. However, a low-offset high speed comparator is needed for this approach. This is especially critical when efficiency is important and a low-resistance low-side FET is used as synchronous rectifier. At low load current, the voltage drop across the transistor is extremely small, typically in a single-digit mV range, making exorbitant demands on the comparator in terms of accuracy and speed.